The present invention relates to a semiconductor device and a method of manufacturing the semiconductor device, and more particularly to a semiconductor device mounting a semiconductor element through a flip-chip connection and a method of manufacturing the semiconductor device mounting the semiconductor element through the flip-chip connection.
With an increase in an integration of a semiconductor element and a reduction in a size of a semiconductor device, there has often been used a method of mounting the semiconductor element through a flip-chip connection. As a method of mounting a semiconductor element onto a substrate through a flip-chip connection, a semiconductor element including a gold bump as a connecting bump is soldered and mounted onto a connecting pad formed on a substrate (for example, see Patent Documents 1 and 2).
The method of mounting a semiconductor element on a substrate by using a gold bump includes a method of sticking solder powder to a connecting pad formed on a substrate and aligning the connecting pad with a gold bump, and carrying out heating to a temperature at which the solder powder is molten, thereby performing solder bonding (Patent Document 3) and a method of previously supplying an underfill resin to a substrate, applying an ultrasonic vibration to a semiconductor element with a gold bump aligned with a connecting pad, and pressing them to bond the gold bump to the connecting pad.
[Patent Document 1] JP-A-8-31835
[Patent Document 2] JP-A-2007-27526
[Patent Document 3] JP-A-2003-7902
The method of sticking the solder powder to the connecting pad and bonding the gold bump to the connecting pad through the solder bonding is used for manufacturing a semiconductor device in which the connecting pad is disposed at a very small pitch of 50 to 60 μm. At the solder bonding step, lead free solders such as Sn-3.5Ag (a melting point of 221° C.) and Sn-3Ag-0.5Cu (a melting point of 217 to 220° C.) have been used to reduce a load for an environment. The lead free solders have higher melting points than those of lead based solders and are used under heating at a high temperature of approximately 250° C. which is higher than the melting points by approximately 30° C.
There is a problem in that the semiconductor device is wholly deformed to be warped depending on a difference between a coefficient of thermal expansion (2.3 ppm/K) of the semiconductor element and a coefficient of thermal expansion (20 to 60 ppm/K) of a substrate formed by an organic substrate when the semiconductor element is thus bonded to the substrate at a high temperature and the temperature is dropped to a room temperature.
FIG. 6 explanatorily shows a state in which temperatures of a semiconductor element 10 and a substrate 20 are dropped to a room temperature after the solder bonding. A gold bump 12 formed on an electrode of the semiconductor element 10 is bonded to a connecting pad 22 formed on the substrate 20 through a solder 14. The substrate 20 has a higher coefficient of thermal expansion than that of the semiconductor element 10. When the temperature is dropped to the room temperature, therefore, the substrate 20 contracts more greatly than the semiconductor element 10 and a force for breaking a bonded portion acts between the gold bump 12 and the connecting pad 22.
When the semiconductor element is mounted through a flip-chip connection, an underfill resin is filled between the semiconductor element and the substrate in order to firmly hold the bonded portion of the semiconductor element and the substrate through the underfill resin and to protect the bonded portion of the gold bump and the connecting pad so as not to be peeled. It is effective that the underfilling is carried out before a drop in the temperature after the solder bonding. However, a void is apt to be generated in the underfill resin when the underfilling is carried out at a high temperature, and the function of the underfilling is greatly deteriorated when the void is generated.
When an arranging pitch of the connecting pad is reduced to be 50 to 60 μm, moreover, a width of the connecting pad is necessarily reduced. For this reason, there is also a problem in that a bonding area of the gold bump and the connecting pad is reduced and a bonding strength is thus reduced, and the bonded portion is apt to be broken by an external force applied from a thermal stress.
If the semiconductor element is mounted in a state in which a stress acts between the gold bump and the connecting pad, moreover, there is also a problem in that an abnormal diffusion is generated in the bonded portion and a whisker is thus formed, resulting in an incomplete electrical connection of the bonded portion with the passage of time after the mounting.